| Years at Pixxel | 5years |
|---|---|
| Satellites delivered to orbit | 6units, flight |
| Major power anomalies, commissioning | 0events |
| Buck converters signed off, production | 11rails |
| Mission / design life, delivered hardware | 5 / 7years |
Spacecraft power electronics engineer with five years of flight-proven delivery and full lifecycle ownership — architecture through CDR, hands-on 4-layer PCB layout, TVAC and vibration qualification, on-orbit commissioning. Six LEO satellites on orbit, zero major power anomalies, spacecraft bus efficiency raised from 85 % to 93 %. Currently Pixxel, Bangalore.
My focus spans power system architecture, DC-DC converter design, AOCS motor drivers, fault-tolerant system design, and COTS radiation-tolerant parts qualification. I work to ECSS, NASA, and ISRO standards across all phases of development. My COTS parts-selection approach — built on NASA NEPP, JAXA, ESA, and CERN / DOE published data — cut component cost by over 90 % and procurement lead time from 16–18 weeks to under three.
I approach hardware the way most engineers approach a puzzle they can't put down. Instinct and understanding first (why does the circuit behave this way), simulation to confirm. I build things outside work because the problems don't stop when the working day does.
I'm most valuable when the work means getting hands dirty in the lab: building, testing, debugging. Open to opportunities that put me closer to the hardware, wherever that is.
| Standards | ECSS, NASA NPR 7123, NASA-HDBK-4001, ISRO PAX, IPC Class 3 |
|---|---|
| Power Architecture | EPS / PCDU |
| Converter Design | Buck, ACF, AOCS motor drivers |
| Stability Analysis | Bode |
| Reliability | FMECA, FDIR |
| Radiation | TID / SEE / SEL, SPENVIS, SHIELDOSE-2 |
| EMI / EMC | Filter + ground |
| MCUs | 32-bit flight-heritage |
| Interfaces | CAN FD, RS-422, SPI, I²C, UART |
| PCB | IPC Class 3, 4L→12L |
| Test Automation | SCPI, Bode 100 FRA |
| Software | Python, C, Bash |
Contributing to the design of an in-house spacecraft AOCS sensor package from requirements through CDR. Flight hardware targeting 2026 fabrication. Compact multi-board architecture with flight-heritage 32-bit MCU, hardware-level fault protection, and CAN-based flight interfaces.
Internal Python / YAMCS-based fleet monitoring tool for the Firefly LEO constellation. Six operational satellites, hundreds of EPS health parameters, subsystem-level anomaly detection, and live requirements traceability. Used for fleet health triage and post-pass review.
Open-source LEO power and radiation sizing in Python / Streamlit. Orekit orbit propagation, SHIELDOSE-2 TID, AP-8 / AE-8 trapped particle models. Battery and solar array sizing, eclipse modelling, TID / DD / SEE estimation. Replaces the SMAD Chapter 11 + Excel workflow used across the industry. Excludes ITAR-restricted models.
ZVS active-clamp forward converter. 48 V input, 5–24 V selectable output. Synchronous rectification, analog control loop with TL431 isolated feedback, planar transformer. Will be published as an end-to-end reference covering magnetics, EMI filter design, and isolated feedback compensation.
VOL-1: ESP32-S3 rotor driving 8×12 APA102C matrix over inductive wireless power, STM32G031 base. Hardest part: power delivery to a rotating assembly. Dual-Rail PSU: 5 V / 3.3 V at 6 A per rail; daily lab driver.
End-to-end embedded project: ESP32-S3 MCU, 480×320 IPS display, Cherry MX matrix, FRAM config, USB HID, WiFi/MQTT. Custom KiCad PCB and OpenSCAD enclosure, released as open hardware under CERN-OHL-W-2.0.
Raspberry Pi 4 running Cloudflare Tunnel, Caddy reverse proxy, Authelia SSO, Pi-hole DNS, Home Assistant, Tailscale mesh, Filebrowser, and a qBittorrent stack, all behind Authelia. Serves this datasheet from the Pi you're currently connected to. Full config and documentation in version control.
Arch Linux with Hyprland. Custom Waybar, Rofi, dunst, OpenRGB. Fully version-controlled environment.
Final-year B.Tech build: a working 8-bit microcomputer assembled from 74-series TTL logic, with a 28C16 EEPROM holding microcoded control words, 74189 SRAM, and a hand-rolled instruction set. Microcode-level control over fetch / decode / execute, clocked by a 555-based pulse generator with single-step debugging. Awarded Best Paper, NCRTEE 2020.
Daily driver is Arch with Hyprland, custom Waybar, Rofi, OpenRGB. Self-hosted on a Pi 4 running Cloudflare Tunnel, Caddy, Authelia, Pi-hole, Home Assistant, Filebrowser, Tailscale.
↗ You are on that Pi right now
Carl Sagan got me here. The Voyagers, still transmitting from interstellar space, remain the most extraordinary engineering achievement I know of.
Long-term roadmap: Geiger counter → fluxgate magnetometer → hydrogen-line radio telescope (1420 MHz) → cloud chamber → SiPM muon detector.
The engineering side: power-unit development, aerodynamic philosophy, systems integration. The intersection of extreme reliability and extreme performance is exactly the problem space I want to work in professionally.
I love trains.
That's it, that's the tweet.
| Rev. | Date | Change | Description |
|---|---|---|---|
| 5.1 | 2025-01 → | Senior Electrical Engineer |
|
| 4.0 | 2021-06 → 2024-12 | Electrical Engineer |
|
| 3.0 | 2021-02 → 2021-06 | Electrical Engineering Intern |
|
| 2.0 | 2020 | B.Tech · ECE |
|
| 1.0 | Ongoing | Hardware as a hobby |
|
Pursuing senior power electronics roles in space, motorsport, aerospace & defence, and high-reliability industrial power. At my best when the work involves building, testing, and debugging real hardware.